#include "stm32f4xx.h"

int main ()  {
  // GPIO clock enable, digital pin definitions
  RCC->AHB1ENR |= 0x00000001;   // Enable clock for GPIOA
  RCC->AHB1ENR |= 0x00000010;   // Enable clock for GPIOE
  GPIOE->MODER |= 0x00010000;   // output pin PE08: time mark
  GPIOE->MODER |= 0x00040000;   // output pin PE09: toggle
  GPIOA->MODER |= 0x00001000;   // output pin PA06: LED D390

  // DAC set-up
  RCC->APB1ENR |= 0x20000000;   // Enable clock for DAC
  DAC->CR      |= 0x00010001;   // DAC control reg, both channels ON
  GPIOA->MODER |= 0x00000f00;   // PA04, PA05 are analog outputs

  // ADCset-up
  RCC->APB2ENR |= 0x00000100;   //  clock for ADC1
  RCC->APB2ENR |= 0x00000200;   //  clock for ADC2
  ADC->CCR      = 0x00000006;   // Regular simultaneous mode only
  ADC1->CR2     = 0x00000001;   // ADC1 ON
  ADC1->SQR3    = 0x00000002;   // use PA02 as input
  ADC2->CR2     = 0x00000001;   // ADC1 ON
  ADC2->SQR3    = 0x00000003;   // use PA03 as input
  GPIOA->MODER |= 0x000000f0;   // PA02, PA03 are analog inputs

  // NVIC IRQ enable
  NVIC_EnableIRQ(TIM2_IRQn);    // Enable IRQ for TIM2 in NVIC 

  // Timer 2 set-up
  RCC->APB1ENR |= 0x0001;       // Enable clock for Timer 2
  TIM2->ARR     = 8400;         // Auto Reload value: 8400 == 100us
  TIM2->CR2    |= 0x0020;       // select TRGO to be update event (UE)
  TIM2->DIER   |= 0x0001;       // DMA/IRQ Enable Register - enable IRQ on update
  TIM2->CR1    |= 0x0001;       // Enable Counting

  // waste time - indefinite
  while (1) {
    if (GPIOE->IDR & 0x0001) GPIOA->ODR |=  0x0040;   // LED on
    else                     GPIOA->ODR &= ~0x0040;   // else LED off
  GPIOE->ODR   |=  0x0200;      // PE09 up
  GPIOE->ODR   &= ~0x0200;      // PE09 down
  };
}

// IRQ function
void TIM2_IRQHandler(void)      // PASS takes approx 500ns of CPU time!
{
  GPIOE->ODR |=  0x0100;        // PE08 up
  TIM2->SR &= ~0x00000001;      // clear update event flag in TIM2
  DAC->DHR12R1  = ADC1->DR;     // pass ADC -> DAC, also clears EOC flag
  DAC->DHR12R2  = ADC2->DR;     // pass ADC -> DAC, also clears EOC flag
  ADC1->CR2  |= 0x40000000;     // simultaneous Start Conversion
  GPIOE->ODR &= ~0x0100;        // PE08 down
}